added xiao nrf54l15 support for otbr

boards/xiao_nrf54l15_nrf54l15_cpuapp.conf

@@ -0,0 +1,18 @@
+# OpenThread RCP on the Seeed XIAO nRF54L15.
+
+# The XIAO has no external SPI flash populated.
+CONFIG_SPI_NOR=n
+
+# Nordic uses this on the nRF54L15 DK to keep the main stack clear of CRACEN
+# (the hardware crypto engine) stack usage.
+CONFIG_MAIN_STACK_SIZE=2048
+
+# Nothing may write to uart20 except spinel. The boot banner and the UART log
+# backend would both land mid-stream and desynchronise otbr-agent's HDLC
+# decoder. Logs ride in-band over spinel instead, where otbr-agent decodes them.
+CONFIG_BOOT_BANNER=n
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=1
+CONFIG_LOG_BACKEND_UART=n
+CONFIG_LOG_BACKEND_SPINEL=y
+CONFIG_LOG_PROCESS_THREAD_STACK_SIZE=2048

boards/xiao_nrf54l15_nrf54l15_cpuapp.overlay

@@ -0,0 +1,36 @@
+/*
+ * OpenThread RCP on the Seeed XIAO nRF54L15.
+ *
+ * uart20 (P1.09 TX / P1.08 RX) is wired to the onboard CMSIS-DAP USB-serial
+ * bridge, so it is both the board's default console and the only UART that
+ * reaches the host over USB. The RCP needs that link for spinel, so:
+ *
+ *   - zephyr,ot-uart  -> uart20  (spinel to otbr-agent on the host)
+ *   - zephyr,console  -> uart21  (moved off, or console output would corrupt
+ *                                 the spinel byte stream)
+ *
+ * uart21 (P2.08 TX / P2.07 RX) is exposed on the XIAO edge pads. Nothing needs
+ * to be attached; hook up a USB-UART adapter there if you want boot logs.
+ *
+ * Unlike Nordic's nrf54l15dk overlay, hw-flow-control is NOT set: the XIAO's
+ * pinctrl only defines TX and RX for uart20, and the CMSIS-DAP bridge does not
+ * carry RTS/CTS. See docs/ for the baud rate this was validated at.
+ */
+
+/ {
+	chosen {
+		zephyr,ot-uart = &uart20;
+		zephyr,console = &uart21;
+		zephyr,shell-uart = &uart21;
+	};
+};
+
+&uart20 {
+	status = "okay";
+	current-speed = <1000000>;
+};
+
+&uart21 {
+	status = "okay";
+	current-speed = <115200>;
+};